Memory configuration with I/O support
US7143211B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2001 |
| Grant date | Nov 28, 2006 |
| Priority date | — |
| Expiry date | Aug 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4217
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for configuring a memory with I/O support. The aim of the invention is to guarantee the processor and I/O functional units that function in time-critical conditions the appropriate priority for data access, using simple programs. To this end, an input memory area which the I/O unit can only write into and which the processor unit can only read out of and an output memory area which the I/O unit can only read out of and which the processor unit can only write into are specified in the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.