Integrated emitter devices having beam divergence reducing encapsulation layer
US7145182B2 · kind B2 · utility
5Cited by
4References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 12, 2003 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Dec 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/853
Abstract
In one embodiment, a method for fabricating an integrated emitter device occurs on a flat substrate such as printed circuit board (PCB). A cup of suitable material such as epoxy is transfer molded on top of the substrate. An emitter is attached to the substrate within the epoxy cup. Wire bonding may occur to provide a path to the emitter. An epoxy encapsulation layer is provided to encapsulate the emitter. The encapsulation layer may be shaped to provide a lens for the emitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.