Shift register
US7145545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2004 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Jun 26, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register is provided, for example, for use in scan and data line drivers for an active matrix liquid crystal display. The shift register comprises X stages, where X is an integer greater than 3. A clock signal generator supplies Y-phase clock signals, where Y is greater than 2. Each of the stages comprises a flip-flop and logic circuit and receives a set enable signal from the immediately preceding stage output. Each stage is set by the leading edge of one of the clock phases in the pressure of the set enable signal and is reset by the trailing edge of the clock phase. In order to provide bi-directional operation, each intermediate stage also receives set enable signals from the immediately succeeding stage output. The clock signal generator supplies clock pulses in a first order for shift register operation in the forward direction and in the reverse order for shift register operation in the reverse direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.