Continuously adjusted-bandwidth discrete-time phase-locked loop
US7145894B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2005 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Jul 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0081
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A user equipment which receives a CDMA communication signal that is wirelessly transmitted includes a system for correcting phase errors in an information signal which has been transmitted. The correction system comprises circuitry for generating a correction signal and for combining the correction signal with the information signal to produce a corrected information signal. An analyzer analyzes the phase of the corrected information signal and generates an error signal based on the deviation of the analyzed phase from a reference phase. A bandwidth controller recursively adjusts the phase of the corrected information signal such that the phase of said corrected information signal is substantially equal to said reference phase. The bandwidth controller selects a bandwidth within an adjustable range based on the error signal, estimates an offset based on the error signal, and modifies the correction signal using the offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.