Bus interface module
US7146538B2 · kind B2 · utility
17Cited by
10References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2003 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Sep 20, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/273
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus interface module (“BIM”) connectable to a debug bus is described. In one embodiment, the BIM comprises a plurality of BIM segments connected in a ring such that an output of each BIM is connected to an input of a next BIM via the debug bus, the BIM comprising logic for receiving data from a previous BIM, logic for receiving data from local logic associated with the BIM, and logic for combining the previous BIM data with local logic data and transmitting the combined data to a next BIM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.