Transport processor for processing multiple transport streams
US7149230B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2002 |
| Grant date | Dec 12, 2006 |
| Priority date | — |
| Expiry date | Feb 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/43853
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A processing apparatus for processing multiple video programs from one or more transport streams. The processing apparatus has a transport processing circuit that includes multiple transport processor units. The transport processor units utilize a common transport processor memory unit having demux context entries containing processing and hardware state information for packet types. Each transport processor unit includes a transport interface for identifying data packets to be acquired from the transport stream, a demultiplexing processor for processing the acquired data packets, and a demultiplexing DMA unit for memory handling operations of the processed data packets. Index chaining allows the transport processor units to access information from the transport processor memory unit. The method uses indices to access demux context entries from the transport processor memory unit. Related DMA indices are used to access memory handling information from the transport processor memory unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.