Method for error correction decoding in a magnetoresistive solid-state storage device
US7149949B2 · kind B2 · utility
3Cited by
43References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2002 |
| Grant date | Dec 12, 2006 |
| Priority date | — |
| Expiry date | Sep 23, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. In a read operation, a set of test cells in a test row are used to predict failures amongst a set of cells of interest storing a block of ECC encoded data. Erasure information is formed from these predictions which identifies potentially unreliable symbols in the block of ECC encoded data, and the ability of a decoder to perform ECC decoding is substantially enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.