Compensation of nonlinearity introduced by dead time in switching output stage
US7151406B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 15, 2005 |
| Grant date | Dec 19, 2006 |
| Priority date | — |
| Expiry date | Jun 10, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/462
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of operating a class D amplifier output stage that compensates for nonlinearity introduced by a residual load current during the dead time in the switching of the output stage. The amplifier output stage includes an input, a gate driver circuit, two output transistors, an output, and a current sensing circuit. The transistors are serially connected between the terminals of a power supply. A residual load current flows through the transistors when they are switched off. The gate driver circuit increases or decreases the duty cycles of signals driving the transistors based on the direction of the residual load current flowing through the transistors, thereby causing the duty cycle of the amplifier output to remain substantially constant and equal to the duty cycle of the amplifier input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.