Digital detection of blockers for wireless receiver
US7151473B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2005 |
| Grant date | Dec 19, 2006 |
| Priority date | — |
| Expiry date | Aug 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/49
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A receiver 100 is provided. The receiver 100 comprises an in-phase analog-to-digital converter 112 operable to detect a saturation condition of the in-phase analog-to-digital converter 112 and to adjust the amplitude of a in-phase signal processed by the in-phase analog-to-digital converter 112 to remove the in-phase analog-to-digital converter 112 from the saturation condition and a in-phase digital filter 114 operable to adjust a gain applied to a digital input to the in-phase digital filter 114 from the in-phase analog-to-digital converter 112, the adjustment of the gain substantially inversely proportional to the adjustment of the amplitude of the in-phase signal processed by the in-phase analog-to-digital converter 112. In an embodiment, the receiver 100 also comprises a quadrature path that is substantially similar to the in-phase path, and the in-phase path and the quadrature path comprise a direct conversion receiver. In an embodiment, the in-phase analog-to-digital converter 112 and the in-phase digital filter 114 comprise an intermediate frequency receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.