Method for improving texture cache access by removing redundant requests
US7151544B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 16, 2003 |
| Grant date | Dec 19, 2006 |
| Priority date | — |
| Expiry date | Dec 12, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Cache access is optimized through identifying redundant accesses (read-requests made to identical system memory addresses), and issuing a single cache data request for each group of redundant accesses. One embodiment of the invention is a graphics system comprising a system memory that stores texture data, coupled to a texture cache that is coupled to one or more texture pipes. Each pipe processes information for a respective spatial bin. A cache preprocessor receives read-requests for texels from the texture pipes and generates a control code corresponding to each read-request, indicating whether the read-request is a redundant access, and linking redundant accesses to a single cache data request. The cache preprocessor provides the control codes and the read-requests to a cache arbiter, which issues the codes and the cache data requests to the texture cache. A cache data router and replicator receives the control codes and the texture data from the texture cache, and provides the appropriate corresponding data to satisfy each request for texels made by the texture pipes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.