General input/output architecture, protocol and related methods to manage data integrity
US7152128B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2002 |
| Grant date | Dec 19, 2006 |
| Priority date | — |
| Expiry date | Nov 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L47/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An enhanced general input/output communication architecture, protocol and related methods are presented. In one embodiment, a method is described comprising receiving a datagram at general input/output (GIO) interface from a remote GIO interface coupled through a GIO link, validating content of one or more packets embedded within the received datagram, and issuing an acknowledgment to the remote GIO interface that the datagram was successfully received on positive validation of the datagram before promoting the embedded packets to a transaction layer of the GIO interface. Other embodiments are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.