Method for making a transistor on a SiGe/SOI substrate
US7153747B2 · kind B2 · utility
0Cited by
7References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 16, 2002 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Jul 21, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/027
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for producing a MOS-type transistor includes providing a substrate comprising a thin layer of silicon (26), integral with an insulating support (14), and covered with a superficial layer (28) of a semi-conductor material, local etching of the superficial layer to expose the silicon layer in at least one channel region, formation of an insulated gate (50) above the silicon layer in the channel region, and formation of a source and a drain on either side of the channel region, the source and drain extending in the layer of silicon and in the superficial layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.