Semiconductor device
US7154152B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 5, 2004 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Sep 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/251
Abstract
A semiconductor device has a p-type substrate, a low-concentration n-type region formed in the p-type substrate, a first high-concentration p-type region formed in the low-concentration n-type region and connected to a first electrode, a first high-concentration n-type region formed in the low-concentration n-type region and connected via a resistive element to the first electrode, a low-concentration p-type region formed contiguously with the first high-concentration n-type region, a second high-concentration n-type region and a second high-concentration p-type region formed in the p-type substrate and connected to a second electrode, and an element separator portion formed between the low-concentration p-type region and the second high-concentration n-type region. This makes it possible to control the switching characteristic of the electrostatic protection circuit with high accuracy and thus to cope with the thinning of the gate oxide film protected by the protection circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.