Semiconductor device and manufacturing method of the same
US7154173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2004 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | May 28, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/924
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
This invention miniaturizes a package of a semiconductor device and simplifies a manufacturing procedure to reduce a manufacturing cost. A semiconductor wafer formed of a plurality of semiconductor chips formed with MEMS devices and wiring thereof on front surface thereof and a cap arrayed wafer disposed with a plurality of sealing caps are attached to seal the MEMS devices in cavities between them. Then, a plurality of via-holes is provided penetrating through the semiconductor wafer to form embedded electrodes therein, and bump electrodes are formed thereon. After this procedure, this structure is cut along scribe lines to be divided into each of packages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.