Patent · US Expired

PLL circuit having reduced capacitor size

US7154345B2 · kind B2 · utility

3Cited by

3References

5Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Miki Moyal · Birkenfeld, DE
Gerd Rombach · Freising, DE

Key dates

Filing date	Nov 1, 2004
Grant date	Dec 26, 2006
Priority date	—
Expiry date	Nov 17, 2024

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/18
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A PLL circuit, having a control loop for an input to a VCO including first and second charge pumps eash having an output coupled to the input of the VCO; an RC network having a first resistance and a capacitance and being and RC network coupled to the output of the first charge pump. A second resistance coupled between the output of the first charge pump and the input to the VCO, the valve of the capacitance C being reduced by a factor X, where

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.