Look ahead LRU array update scheme to minimize clobber in sequentially accessed memory
US7155574B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2006 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | May 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/127
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high-speed memory management technique that minimizes clobber in sequentially accessed memory, including but not limited to, for example, a trace cache. The method includes selecting a victim set from a sequentially accessed memory; selecting a victim way for the selected victim set; reading a next way pointer from a trace line of a trace currently stored in the selected victim way, if the selected victim way has the next way pointer; and writing a next line of the new trace into the selected victim way over the trace line of the currently stored trace. The method also includes forcing a replacement algorithm of next set to select a victim way of the next set using the next way pointer, if the trace line of the currently stored trace is not an active trace tail line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.