Dynamic reordering of memory requests
US7155582B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 18, 2004 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Nov 27, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1631
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An arbitrator (24) is disclosed for reordering access requests (25) to a memory system (150) to reduce memory system conflicts. The arbitrator comprises a transaction buffer (203) for buffering the access requests (25), an output counter (207) for counting access requests issued by the arbitrator (24), a mapping table (211) for mapping at least the output counter (207) to the access requests (25) in the transaction buffer (203), and a reordering unit (225) for dynamically re-ordering entries in the mapping table (211) such that the mapping points to the access requests (25) in an issue order wherein memory system conflicts are reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.