System and method for process load balancing in a multi-processor environment
US7155722B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2001 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Sep 27, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/508
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A load balancing mechanism and technique that monitors a memory interface associated with a processor resource in a processor pool associated with at least one node of a computer network. The monitoring determines the actual load activity executed by the processor during a specified period of time. The mechanism comprises a hardware access monitor configured to determine the true activity of each processor resource. The access monitor tracks certain memory requests over the memory interface and stores the requests in a counter assigned to each processor. The access monitor then collects statistics from each processor resource of the pool and provides those statistics to a central load balancing resource for use when determining assignment of loads (tasks) to the various processor resources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.