Methods for fabricating thin film transistors
US7157323B2 · kind B2 · utility
16Cited by
3References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2005 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Jun 2, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6739
Abstract
Fabrication methods for thin film transistors. A metal gate stack structure is formed on an insulating substrate. The substrate is performed using thermal annealing to create an oxide layer on the sidewalls of the metal gate stack structure. A gate insulating layer is formed on the substrate covering the metal gate stack structure. A semiconductor layer is formed on the gate insulating layer. A source/drain layer is formed on the semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.