Active matrix substrate with TFT and capacitor, and LCD using the same
US7157735B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2002 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Dec 17, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136227
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin-film transistor substrate, including a substrate with an insulating surface, gate electrodes, lower electrodes of capacitors made of the same material layer as the gate electrodes, a first insulating layer, a channel layer of high resistivity semiconductor having a concave part, and a pair of low resistivity source/drain electrodes. There is also a second insulating layer formed on the first insulating layer. A first connection hole penetrates the second insulating layer and exposes one of each of the pair of the source/drain electrodes. A second connection hole penetrates the second insulating layer and exposes a connection region of each of the upper layers of the upper electrode above the lower layer. A pixel electrode is formed on the second insulating layer and is connected to one of the source/drain electrodes and the upper layer of the upper electrode of the capacitor via the first and second connection holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.