Switched capacitor sampler circuit and method therefor
US7157955B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 3, 2004 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Feb 2, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/496
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A switched capacitor sampler circuit (220) includes an input terminal (224) for receiving an input voltage, an output terminal (226), a capacitor (222) having first and second terminals, and a switching circuit (230). The switching circuit (230) is coupled to the input terminal (224), the output terminal (226), and the first and second terminals of the capacitor (222). The switching circuit (230) stores a charge on the capacitor (222) proportional to the input voltage during a sample period, and transfers the charge from the capacitor (222) to the output terminal (226) during a transfer period subsequent to the sample period. The switching circuit (230) transfers the charge in a plurality of charge portions corresponding to a like plurality of phases of the transfer period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.