Clocked DAC current switch
US7158062B2 · kind B2 · utility
5Cited by
12References
51Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 21, 2004 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Aug 15, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/464
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A switch having a first arrangement for providing a first set of first and second complementary intermediate signals; a second arrangement for providing a second set of third and fourth complementary intermediate signals; a third arrangement responsive to the first set of signals for providing complementary output signals; a fourth arrangement responsive to the second set of signals for providing complementary output signals; and a fifth arrangement for selectively activating the third means or the fourth arrangement in response to a control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.