Half duplex link with isochronous and asynchronous arbitration
US7158532B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1998 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Sep 9, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/6418
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Transactions are scheduled over a half duplex link between a first device, such as an IO unit, and a second device, such as a memory controller. Information flowing over the half duplex link is divided into a plurality of service periods, and an isochronous transaction, such as an isochronous memory read or write, is scheduled in a service period N if the isochronous transaction is ready to be serviced before service period N at the first or second device. An asynchronous transaction ready to be serviced at the first or second device, such as an asynchronous memory read or write, is scheduled if no isochronous transaction is ready to be serviced. The asynchronous transaction may be scheduled by (a) scheduling an asynchronous transaction ready to be serviced at the first device if no asynchronous transaction is ready to be serviced at the second device; (b) scheduling an asynchronous transaction ready to be serviced at the second device if no asynchronous transaction is ready to be serviced at the first device; and (c) scheduling an asynchronous transaction ready to be serviced at the first or second device, according to an arbitration algorithm, if asynchronous transactions are rea…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.