Simplified memory detection
US7159104B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 20, 2003 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Jul 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R13/7039
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Automatic recognition of the type of memory within a device package by using strap resistors within the device package. Such recognition enables a processor, such as a GPU, to automatically configure itself to work with the memory. A device package includes a strap contact and a bit input that are electrically connected. The device package beneficially contains a processor (such a GPU) that is operatively connected to the bit input, and a memory device that is operatively connected to the processor. By selectively inserting a strap resistor the voltage applied to the bit input changes state. That state can be read and used to set up the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.