Method and apparatus for data transfer between at least two modules interconnected by a serial data bus
US7159138B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2002 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Jan 27, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for serial data transfer between at least two modules (10, 12) connected to each other by way of a serial data bus (18) where the data transfer is governed by a clock signal (CLK). The modules (10, 12) each comprise a receiver unit (30) for the reception of the data and a transmitter unit (22) for the transmission of data. The output of a data value by the transmitter unit (22) of one module (12) to another module (10) at the serial data bus (18), and the import of the data value by the receiver unit (30) of the corresponding other module (10) are initiated by slopes of the clock signal (CLK). The clock signal that triggers the transmission of this data value in the one module (12) is delayed via a delay element (38) one pulse repetition period (ΔTP) of the clock signal (CLK).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.