MOS transistor and method of manufacturing the same
US7160783B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 2004 |
| Grant date | Jan 9, 2007 |
| Priority date | — |
| Expiry date | Dec 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/371
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal oxide semiconductor (MOS) transistor and a method of manufacturing the same are disclosed. An example MOS transistor includes a semiconductor substrate of a first conductivity type where an active region is defined, a gate insulating layer pattern and a gate formed on the active region of the substrate, a spacer formed on side walls of the gate, and source/drain extension regions of a second conductivity type formed within the substrate at both sides of the gate. The example MOS transistor further includes source/drain regions of the second conductivity type formed within the substrate at both side of the spacer and punch-through suppression regions of the first conductivity type formed within the active of the substrate. The punch-through suppression regions surround the source/drain extension regions and the source/drain regions under the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.