Analog calibration of a current source array at low supply voltages
US7161412B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 15, 2005 |
| Grant date | Jan 9, 2007 |
| Priority date | — |
| Expiry date | Jul 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1057
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A calibration circuit for a current source cell includes a reference current source and a transresistance amplifier forming a feedback loop for calibrating the output current of the current source cell. The reference current source supplies a reference current to a first node switchably connected to the current output node of the current source cell. The transresistance amplifier has an input terminal coupled to the first node and an output terminal switchably connected to a calibration node of the current source cell. With the calibration circuit coupled for calibration, an input current develops at the first node being the difference between the output current of the current source cell and the reference current. The transresistance amplifier receives the input current and generates an output voltage for driving the calibration node. The output voltage has a value operative to nullify the difference between the output current and the reference current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.