Parallel power amplifier and associated methods
US7161423B2 · kind B2 · utility
29Cited by
12References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2004 |
| Grant date | Jan 9, 2007 |
| Priority date | — |
| Expiry date | Aug 9, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/21172
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus is provided for use in power amplifiers where multiple parallel power amplifiers provide various output power levels. By selectively enabling and disabling the parallel power amplifiers and combining their outputs, a desired output power can be realized, while choosing a combination of power amplifiers that provide a high efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.