Test circuit for measuring sense amplifier and memory mismatches
US7164612B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2003 |
| Grant date | Jan 16, 2007 |
| Priority date | — |
| Expiry date | Jan 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Post-manufacture compensation for a sensing offset can be provided, at least in part, by selectively exposing one of a pair of cross-coupled transistors in a sense amplifier to a bias voltage selected to cause a compensating shift in a characteristic of the exposed transistor. In designs susceptible to post-manufacture data dependent creep in a device characteristic, such exposure may be advantageously provided in situ by causing the sense amplifier to sense values purposefully skewed toward a predominate value selected to cause the compensating shift. In some realizations, an on-chip test block is employed to identify and characterize sensing mismatch. Typically, the techniques described herein may be employed to address sensing offsets that have developed post-manufacture due to a data-dependent effect. However, in some realizations, the techniques described herein may be used to address a sensing offset arising at least in part from other or additional sources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.