Address range comparator for detection of multi size memory accesses with data matching qualification and full or partial overlap
US7165018B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2002 |
| Grant date | Jan 16, 2007 |
| Priority date | — |
| Expiry date | Jan 11, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3656
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An memory access address comparator includes two comparators comparing an input memory access address with respective reference addresses. The comparators produce a match indication on selectable criteria, such as address size, full or partial overlap, greater than, less than, equal to, not equal to, less than or equal to, and greater than or equal to, and can be selectively chained. Input multiplexers permit memory access address bus selection. The comparator output may be selectively dependent upon corresponding data matches. The reference addresses, comparison data and control functions are enabled via central processing unit accessible memory mapped registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.