Planarization for integrated circuits
US7166546B2 · kind B2 · utility
0Cited by
8References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 20, 2004 |
| Grant date | Jan 23, 2007 |
| Priority date | — |
| Expiry date | Aug 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7684
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of planarizing a layer of an integrated circuit. In one embodiment, a liquid film is applied over the layer, using extrusion coating techniques. In another embodiment, the layer itself may be applied as a liquid film, using extrusion techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.