Method and system for identifying errors in computer software
US7168009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2003 |
| Grant date | Jan 23, 2007 |
| Priority date | — |
| Expiry date | Feb 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3688
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a method and system for analyzing a computer program. The method comprises the steps of analyzing the program to generate an initial error report and a list of suspected error conditions, and generating a set of assertions and inserting the assertions into the program to determine if the suspected error conditions are valid. Preferably, a strong static analysis method is used to identify an initial set of error reports. When this analysis fails to determine if the condition is true or false, the condition along with the potential program error is captured to form a suspected error. Suspected errors are directed to an assertion generator to produce a monitor—that is, source code modification that is integrated with the original program. This and other inserted monitors check the conditions for the suspected error during the program execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.