Data processing system and method
US7168024B2 · kind B2 · utility
9Cited by
6References
42Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 3, 2003 |
| Grant date | Jan 23, 2007 |
| Priority date | — |
| Expiry date | Feb 11, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6516
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for generating at least one error checking code includes creating a modified input data word, including (k+m) bits, by combining an input data word, having n-bits, with at least a previously calculated at least one error checking code, including in-bits, where n≦k, and calculating a first m-bit error checking code from at least a first selected portion of the modified input data word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.