Design and fabrication of inductors on a semiconductor substrate
US7170382B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2004 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Apr 27, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49073
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to an inductor fabricated above a substrate surface comprising a first set of inductors in a lower dielectric layer, a second set of inductors in an upper dielectric layer, and interconnects extending between the first and second sets of conductors to form a single continuous helical current path that turns around a central region. Since each turn of the inductor includes only one leg close to the substrate, the parasitic capacitance between the inductor and the substrate can be reduced and there is more free space in the upper and lower layers for increasing the width of the conductors and thereby reducing the series resistance of the inductor. Meanwhile, since the magnetic field generated by the inductor is substantially confined in a closed tube defined by its turns, there is less interference between the inductor and its neighboring components on the same and/or surrounding substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.