Current mode analog-to-digital converter using parallel, time-interleaved successive approximation subcircuits
US7170436B2 · kind B2 · utility
7Cited by
18References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 20, 2005 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Jun 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/745
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A High-speed Current Mode Analog to Digital Converter is disclosed. The ADC is high-speed, yet is manufacturable at a relatively low cost. The device processes an analog signal through a plurality of successive approximation ADC subcircuits cooperatively arranged to operate in parallel, time-interleaved fashion. The ADC subcircuits operate in current mode rather than voltage mode in order to further accelerate their operations and provide lower cost. Finally, the SDC subcircuits each employ a novel current mode digital-to-analog converter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.