Data receiver
US7170947B2 · kind B2 · utility
1Cited by
15References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2002 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Aug 16, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2025/03617
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver (1) has an equalizer (2, 4, 5) which introduces inter symbol interferance (ISI) in a controlled manner and low pass filters to reduce noise. The ISI is introduced and the noise is reduced by a filter (4) in an adaptation path. A trellis decoder (3) of the receiver (1) removes the ISI to avoid propagation error. It does this in front end modules (20), outside of its critical path. There is a better decoder performance because noise is smaller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.