System on chip processor for multimedia devices
US7171050B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 2003 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Feb 19, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system on chip processor for a multimedia device includes: a pre-processing circuit to convert an external image signal into a compressed input signal for compressing; an encoder/decoder circuit to generate compressed data by compressing the compressed input signal and outputting a coded image signal by decompressing the compressed data; a post-processing circuit to convert the coded image signal into a signal that can be used by an image displaying device; a first system bus connected with pre-processing circuit and post-processing circuit; a second system bus connected with the encoder/decoder circuit; a first bridge DMA circuit to mutually transmit data between first system bus and second system bus; and a controller to control the operation of the circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.