Envelope limiting for polar modulators
US7171170B2 · kind B2 · utility
18Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 23, 2002 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Nov 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/045
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Envelope limiting for a polar modulator. A system is provided that intelligently compresses the amplitude modulation in a polar modulator so that it can be implemented with a single-stage variable gain amplifier. Limiting the amplitude modulation range on the low side prevents collapse of the transmit signal's time-varying envelope and eases circuit implementation. Limiting the amplitude modulation range on the high side reduces the peak-to-average ratio of the waveform and thereby improves the efficiency of the radio transmitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.