Data encryption and decryption
US7171566B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 11, 2002 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Jan 18, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a computer processing apparatus, when writing data to, and/or reading data from, memory, one or more instruction bits are associated with the memory address for the data to specify how encryption or decryption is to be performed. The bit(s) may be part of the memory address or separate therefrom, for example as a data header. Multiple data paths provided to write data to, and read data from, memory. On at least one of the paths is hardware operable to perform encryption or decryption. Preferably at least one path is a non-encryption/decryption path. The path to be used to write the data to, or read the data from, memory is chosen in accordance with the instruction bits associated with the memory address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.