Comparison of circuit layout designs
US7171639B2 · kind B2 · utility
2Cited by
6References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2004 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Feb 24, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first circuit layout design is obtained, and a second circuit layout design is obtained. A first topology graph is generated for the first circuit layout design, and a second topology graph is generated for the second circuit layout design. The first topology graph and the second topology graph are compared to obtain a comparison result. The comparison result is reported.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.