Range controller circuit and method
US7173493B1 · kind B1 · utility
2Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 2, 2004 |
| Grant date | Feb 6, 2007 |
| Priority date | — |
| Expiry date | Aug 4, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A range controller circuit has a master counter with a recovered clock input. A sampled counter has a reference clock input. A link fault indicator logic is coupled to an output of the master counter and an output the sampled counter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.