Parallel computing system, method and architecture
US7174381B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2002 |
| Grant date | Feb 6, 2007 |
| Priority date | — |
| Expiry date | Feb 5, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/508
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parallel or computing system and method make use of a plurality of adapters each affording a specific type of processing algorithm. At each point in an application, an adapter is identified, to parallelize that portion of the application. The process involves associating an appropriate adapter with the application portion, parsing the application portion to define tasks that may be distributed over the available computers. Combined with the parallelized program is a software server that is designed to cooperate with the adapters to control and supervise distributed processing functions. Such functions include mapping, load balancing, and error detection and correction. Also included are functions that cause the results of the computing to be coordinated in real-time and returned appropriately, according to the application. In addition to the parallelized program and server, an application created by the present invention is provided with the functionality of virtual middleware, which interfaces with and controls existing forms of middleware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.