Semiconductor device having a nonvolatile memory array and an authentication circuit arranged in a vertical stack configuration
US7177187B2 · kind B2 · utility
35Cited by
7References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 28, 2004 |
| Grant date | Feb 13, 2007 |
| Priority date | — |
| Expiry date | Dec 28, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor includes an authentication circuit for judging access right. The data processor further includes a nonvolatile memory cell array formed on an insulator film of a chip, and a conductor layer provided between a logic circuit of the authentication circuit and the nonvolatile memory cell array. The nonvolatile memory cell array can store at least part of authentication information or an authentication program.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.