Reduction of false alarms in PCB inspection
US7177458B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2000 |
| Grant date | Feb 13, 2007 |
| Priority date | — |
| Expiry date | Jun 13, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30141
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for automatically optically inspecting an electrical circuit (12), comprising: acquiring at least one optical image of an electrical circuit (12); generating at least one first inspection image from the at least one image and determining regions of candidate defects (236) therefrom; generating at least one additional inspection image for regions surrounding candidate defects (236), said at least one additional inspection image at least partially including optical information not included in the at least one first inspection image; and determining whether the candidate defect (236) is a specious defect by inspecting the at least one additional inspection image.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.