Chipset support for managing hardware interrupts in a virtual machine system

US7177967B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Stalinselvaraj Jeyasingh · Portland, US
• Andrew V. Anderson · Forest Grove, US
• Steven M. Bennett · Hillsboro, US
• Erik Cota-Robles · Portland, US
• Alain Kagi · Portland, US
• Gilbert Neiger · Portland, US
• Richard Uhlig · Hillsboro, US

Key dates

• Filing date: Sep 30, 2003
• Grant date: Feb 13, 2007
• Expiry date: Jul 4, 2024

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/4812
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

In one embodiment, an apparatus includes a set of multiplex blocks coupled with an interrupt controller and multiple interrupt request lines, and a virtual machine monitor block (VMM) coupled to the set of multiplex blocks. Each multiplex block corresponds to a distinct interrupt request line. Each multiplex block is to route the interrupt request signal received via the corresponding interrupt request line either to the interrupt controller or the VMM block depending on a current configuration value of this multiplex block.