Encoder using low density parity check codes and encoding method thereof
US7178085B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2003 |
| Grant date | Feb 13, 2007 |
| Priority date | — |
| Expiry date | Nov 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1182
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An encoder using LDPC (low density parity check) codes, and an encoding method. The encoder comprises a parity check matrix generator for generating a parity check matrix H; and a codeword generator for processing the parity check matrix H to generate a codeword, and the codeword generator comprises: an AB analyzer for analyzing the parity check matrix H into matrixes A and B; a pivoting unit for pivoting the parity check matrix H; a bit-reversing unit for bit-reversing the pivoted matrix; an LU analyzer for analyzing the matrix A into matrixes L and U; and a codeword generator unit for performing a logical operation on the matrixes A, B, L and U. A bit-reversing method is used to effectively generate a parity check matrix having a high girth by using a regular encoder.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.