Error correction code decoding device
US7178090B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2002 |
| Grant date | Feb 13, 2007 |
| Priority date | — |
| Expiry date | May 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/3905
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an error correction code decoding apparatus, utilized in the decoding of turbo codes, plural number of backward processing modules 100, 110 and 120 are provided. In one backward processing module, received data and a priori information are periodically read in the reverse order from memories 140 and 150 to calculate backward values. The other backward processing modules are supplied with received data and the a priori information, output from the preset other backward processing module to calculate backward values. The backward processing module reading in from the memories is cyclically changed. A forward processing and soft-output generating module 130 generates a soft-output by exploiting the backward values calculated by the backward processing module which lies directly ahead of the backward processing module reading in the data from the memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.