Duty cycle correcting circuits having a variable gain and methods of operating the same
US7180346B2 · kind B2 · utility
31Cited by
8References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 25, 2004 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Feb 2, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Duty cycle correcting circuits having a gain adjusting circuit that selects one of a plurality of gains of the duty cycle correcting circuit based on a frequency of an input signal. An output circuit outputs a duty cycle corrected output signal based on the input signal and the selected one of the plurality of gains. The input signal may be an input clock signal and the output signal may be a corrected clock signal. Methods are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.