PLL circuit
US7180375B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2003 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Feb 17, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/103
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A PLL circuit comprises a phase comparator for comparing phases between a reference signal and an internal signal and outputting a phase difference signal according to a phase difference therebetween, a voltage controlled oscillator group composed of a plurality of oscillators which have mutually different frequency variable ranges and whose oscillation frequencies are respectively controlled in accordance with a phase control signal, a selecting means for selecting one of the outputs from the plurality of oscillators based on the phase difference signal or the phase control signal, and a frequency divider for generating the internal signal by dividing an output of an oscillator selected by the selecting means, and when the oscillator selecting state is changed, an output phase of the frequency divider is approximated to the phase of the reference signal. Thereby, a required voltage controlled oscillator can be selected in a short time according to a desirable oscillation frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.