Deterministic shut down of memory devices in response to a system warm reset
US7181605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2003 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Feb 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to deterministically shut down memory devices in response to a system warm reset has been disclosed. One embodiment of the method includes causing a first type of reset in a number of memory devices in a system in response to a second type of reset in the system being initiated if the memory devices are not initialized and enabling a deterministic shutdown mode in a memory controller, which is coupled to the memory devices, after the memory devices have been initialized. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.